1. Field of the Invention
This invention relates to a direct bonded wafer possessing a gettering effect or a bonded wafer of the SOI (silicon on insulator) configuration using an intervening dielectric layer and to a method for the production thereof.
2. Description of the Prior Art
In recent years, the wafers of the SOI (silicon on insulator) configuration have come to attract attention from the standpoint of the growing trend of semiconductor devices toward three-dimensional configuration, high voltage breakdown, and dielectric separation between adjacent components. The SOI configuration comprises two layers of single crystal silicon Wafer and an silicon oxide film as an insulating film interposed between the two layers. As a means of producing a wafer of the SOI configuration, Japanese Patent Publication SHO 62(1987)-34,716 discloses a method which produces an integral thin film of single crystal silicon by forming a thermal oxide film on the surface of a single crystal wafer, providing the single crystal silicon wafer at a peripheral part thereof with a single crystal projection integrally continuing therewith, coating the thermal oxide film with a polycrystalline or amorphous silicon film, causing an energy beam such as an electron beam or a laser beam to irradiate the silicon film linearly and unidirectionally thereby fusing the silicon film linearly, and cooling and solidifying the fused silicon film. This method, however, is in a true sense such that though the formation of a single crystal is partly accomplished, the production of a single crystal silicon film fit for actual use is attained only with difficulty from the interaction between the fused silicon and the oxide film.
As a means of overcoming this problem and allowing production of a wafer of the SOI configuration by bonding, a method which produces a bonded wafer by directly bonding two single crystal silicon wafers having an silicon oxide film formed on the surface thereof each and then reducing one of the silicon wafers into a thin film by etching away the free surface region thereof has been disclosed [Tadayoshi Enomoto: "Nikkei Microdevices," No. 15, page 39 (September, 1986); and Lasky, Stiffer, White, and Abernathy: "Digest of the IEEE Int. Elec. Device Meeting (IEDM)," page 688 (December 1985)]. To be specific, a high-concentration n.sup.+ silicon substrate having a low-concentration n.sup.- epitaxial layer formed on the surface thereof and a low-concentration silicon substrate for supporting are prepared and thermal oxide films are formed one each on the opposed surface of the two substrates. Then, the coated substrates are mutually superposed, contacted closely against each other, and heat-treated in an oxidizing atmosphere at 700.degree. C. thereby to complete bonding of the SiO.sub.2, layers. The variation of the silicon oxide film in thickness from the level of natural silicon oxide film to 520 nm has been demonstrated experimentally. Incidentally, the mechanism of the bonding is explained as follows. First, when the O.sub.2 gas present between the wafers is converted into SiO.sub.2, a vacuum part is partially produced and the wafers are forced to stick fast in part to each other. Once this fast stick is produced, the bonding between the wafers is eventually completed through the reactions of hydrogen bonding and dehydration condensation. Then, the SOI configuration is completed by removing the n.sup.+ silicon substrate through selective etching while allowing the n.sup.- epitaxial layer to remain intact.
Now, that efforts are directed to producing semiconductor devices with enhanced density and increased fineness and expectations are entertained of further improvement in overall characteristic properties and in productional efficiency, the gettering process has been finding extensive utility as a technique which, by giving a treatment of a certain kind to a semiconductor wafer either in the course of device production or in the preparation of a starting material, imparts an ability to inactivate defects or harmful impurities to the semiconductor wafer. It has been known that the gettering treatment decreases the leak current across the pn junction, improves the life time of the carrier, and notably enhances the yields of the MOS device and the bipolar device alike.
The method which produces a wafer of the SOI configuration by the bonding described above, however, has the problem that it cannot expect the gettering effect because no special attention is paid to controlling the amount of impurities which exist on the surfaces of junction prior to their bonding.
The n/n.sup.+ or p/p.sup.+ junction in the bonded wafer of the type obtained by giving a mirror finish to the main surfaces on one side of each of the two single crystal silicon wafers, directly bonding the mirror surfaces of the wafers, and reducing one of the wafers into a thin layer is a product of ideal step junction and, therefore, is advantageous for design and fabrication of semiconductor devices over the conventional epitaxial junction. The bonded wafers of this type are not necessarily fully satisfactory in terms of purity.